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ASIC Design Engineer Jobs

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Application Engineer or Senior Application Engineer

Incentia Design Systems

Responsibility: Work with Incentia Sales team on pre-sales and post-sales benchmark and customer supports for Taiwan or Asia territory. Develop product demo, application notes, and training materials, and help Sales team engage and close customer accounts. Requirement: BS, MS, or

3/5/2017  Santa Clara, CA  Save This Job

Field Application Engineer

CLK Design Automation

5 years experience in ASIC or Custom semiconductor implementation or applications engineering. Must have excellent communication skills. Static Timing and signal integrity experience needed. Working knowledge of scripting tools such as TCL, Perl, Python. C level API

3/6/2017  San Jose, CA  Save This Job

Senior Staff Engineer, Digital Design

Inphi

Engineering Santa Clara, CA, United States We are seeking to hire Senior Staff Design engineer for primary contribution to innovative, industry leading PHY ASIC development activities for 100Mbps++ Coherent Optical networks. The engineer will be responsible for OTN/Ethernet

4/25/2017  Santa Clara, CA  Save This Job

Senior Principal Engineer, Digital Design

Inphi

Engineering Santa Clara, CA, United States We are seeking to hire Senior Principal Design engineer for primary contribution to innovative, industry leading PHY ASIC development activities for 100Mbps++ Coherent Optical networks. The engineer will be responsible for

4/25/2017  Santa Clara, CA  Save This Job

Principal Engineer, Physical Design

Inphi

Engineering Santa Clara, CA, United States Physical Design Engineer Principal Engineer to lead Physical Design activities on the next high complexity ASIC/advanced technology node. Candidate should be familiar with all phases of ASIC design from synthesized gates to GDS. This

3/26/2017  Santa Clara, CA  Save This Job

Principal Engineer, Physical Design

Inphi

Engineering Santa Clara, CA, United States Physical Design Engineer Principal Engineer to lead Physical Design activities on the next high complexity ASIC/advanced technology node. Candidate should be familiar with all phases of ASIC design from synthesized gates to GDS. This

3/26/2017  Santa Clara, CA  Save This Job

Senior Applications Engineer (Software)

Achronix Semiconductor

Achronix >> Senior Applications Engineer (Software) Achronix Semiconductor is an emerging growth company that offers industry leading, high-density and high-performance application-targeted field programmable gate arrays (FPGAs). Achronix is constantly seeking intelligent,

3/19/2017  Santa Clara, CA  Save This Job

Senior Engineer, Physical Design

Inphi

Engineering Cordoba, Argentina, Argentina The Senior Engineer will be responsible for the physical implementation and verification of SoC?s in CMOS technology, develop a new flow or improve the existing design flow. Estimate complexity, area and power for blocks or top level.

4/25/2017  Cordoba, AR  Save This Job

Senior Applications Engineer

Achronix Semiconductor

Achronix >> Senior Applications Engineer Achronix Semiconductor is an emerging growth company that offers industry leading, high-density and high-performance application-targeted field programmable gate arrays (FPGAs). Achronix is constantly seeking intelligent, highly

3/19/2017  Santa Clara, CA  Save This Job

Systems Software Engineer

Achronix Semiconductor

Achronix >> Systems Software Engineer Achronix Semiconductor is an emerging growth company that offers industry leading, high-density and high-performance application-targeted field programmable gate arrays (FPGAs). Achronix is constantly seeking intelligent, highly motivated,

3/19/2017  Santa Clara, CA  Save This Job

Memory Interface Applications Engineer

Achronix Semiconductor

Achronix Semiconductor is an emerging growth company that offers industry leading, high-density and high-performance application-targeted field programmable gate arrays (FPGAs). Achronix is constantly seeking intelligent, highly motivated, and dynamic individuals experienced in

3/19/2017  Santa Clara, CA  Save This Job

Application Engineer

Atoptech

Application Engineer: Participate at the design, implementation and support of cutting-edge Electronic Design Automation (EDA) tools used to create, simulate, and verify physical design layout of Very Large-Scale Integrated (VLSI), CMOS and ASIC circuits, including synthesis of

3/7/2017  Santa Clara, CA  Save This Job

Staff Engineer, ASIC DFT (Contract)

Inphi

Engineering Los Altos, CA, United States The (Contract) engineer will be responsible for the DFT implementation, design, coding, synthesis and static timing analysis of the next general optical networking ASIC. Typical activities include development of hardware block design

4/25/2017  Los Altos, CA  Save This Job

Senior Engineer, Software

Inphi

Engineering Westlake Village or Santa Clara, CA, United States The Senior Software Engineer will be part of a team developing embedded firmware for systems and sub-systems. You will also collaborate with internal developers to help drive design of future ASICs to match system

3/26/2017  Westlake Village, CA  Save This Job

Principal Engineer, Analog Design

Inphi

Engineering Santa Clara, CA, United States Staff Engineer, Analog Design Engineering Santa Clara, Ca, United States Inphi Background Inphi Corporation, a high-speed analog semiconductor company, is the market leader in high-speed datacenter interconnect solutions. Founded

3/26/2017  Santa Clara, CA  Save This Job

Staff Engineer, Analog Design

Inphi

Engineering Santa Clara, CA, United States Staff Engineer, Analog Design Engineering Santa Clara, Ca, United States Inphi Background Inphi Corporation, a high-speed analog semiconductor company, is the market leader in high-speed datacenter interconnect solutions. Founded

3/26/2017  Santa Clara, CA  Save This Job

R&D (Research and Development) Engineer

Atoptech

Research, design and develop computer-aided very large scales integrated circuit (VLSI) physical design and verification tools for application specific integrated circuits (ASIC) and system on chip (SoC) design for advanced nodes (nanometers) processing, including the design and

3/7/2017  Santa Clara, CA  Save This Job

Digital DSP Designer

Luxtera

JOB PURPOSE: This position is for PHY transceiver digital DSP blocks design, and verification. JOB DUTIES AND RESPONSIBILITIES: ? Design, verify, and VLSI implementation of various high speed digital PHY communication blocks. ? Work closely with the PHY system team to co-verify

3/20/2017  Carlsbad, CA  Save This Job

Digital Verification Designer

Luxtera

JOB PURPOSE: This position is for PHY transceiver digital blocks level and chip level verification. JOB DUTIES AND RESPONSIBILITIES: ? Develop verification test plans and test cases that cover all system features of complex chip ? Writing/debugging test code/ test benches ? Work

3/20/2017  Carlsbad, CA  Save This JobApplied To