ASIC Verification/DFT Engineer Jobs
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ASIC Verification/DFT Engineer
Uniquify, Inc.
Candidate must have 3 to 5 years experience in simulation / verification of complex designs in verilog / system verilog. Experience in gate level timing simulation and DFT related experience is a plus. Qualifications: Thorough understanding of verilog constructs and
4/16/2013 Santa Clara, CA Save This JobSenior VLSI Design Engineer
Audience
Job Description Your goal is to formulate and validate the next generation ASIC architecture for an audio noise suppression market leading product. You will work closely with VLSI Architecture, Design, Verification and DSP teams. Scope of responsibility will include proposing,
3/23/2013 Mountain View, CA Save This JobPrincipal ASIC Design Engineer
ClariPhy Communications
Job Description The engineer will be responsible for optical PHY DSP (Digital Signal Processing) centric block modeling, RTL design/coding, DSP block (can include vector matching) verification, synthesis and static timing analysis of next generation optical networking ASICs.
4/21/2013 Irvine, CA Save This JobSenior ASIC Design Engineer
Solarflare Communications
We are looking for ASIC design engineers to create industry leading next generation high speed network controller ASIC products. Responsibilities: Micro-architecture and RTL coding based on architecture specification Generate synthesis and timing signoff constraints
3/23/2013 Irvine, CA Save This Job