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Candidate must have 3 to 5 years experience in simulation / verification of complex designs in verilog / system verilog. Experience in gate level timing simulation and DFT related experience is a plus. Qualifications: Thorough understanding of verilog constructs and10/20/2013 Santa Clara, CA Save This Job
We are looking for ASIC design engineers to create industry leading next generation high speed network controller ASIC products. Responsibilities: Micro-architecture and RTL coding based on architecture specification Generate synthesis and timing signoff constraints10/23/2013 Irvine, CA Save This Job
Job Type : Full Time Career Level : Manager (Manager/Supervisor of Staff) Education : Bachelor's Degree Category : Engineering Job Description : We are looking for an energetic and well organized Senior Digital Design Engineer to join our Engineering team. The successful10/16/2013 Campbell, CA Save This Job
Inphi Corporation, a high-speed analog semiconductor company, is the market leader in data transport and signal integrity solutions from fiber to memory. We address the bandwidth, capacity and power issues faced by cloud computing, mega data center, and 40G/100G network11/4/2013 Santa Clara, CA Save This Job
Are you an experienced engineer with experience in low-power/mixed-signal verification design? Are you inspired by making technology more efficient and introducing a new perspective on how it should be done? Are you interested in being part of a team that is revolutionizing and11/11/2013 Austin, TX Save This Job