Design Verification Engineer Jobs
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Design Verification Engineer
Tensilica
Tracking Code 515 Job Description As a member of the Design Verification Team for Xtensa processors you will be responsible for verification of microprocessor cores and their peripherals. You will implement simulation or emulation test benches, assembly/C language diagnostics,
4/24/2013 Santa Clara, CA Save This JobDesign Verification Engineer
VeriSilicon
Descriptions: 1. Develop environments for complex system functional verification. 2. Create and maintain RTL integration of system level components. 3. Write verification plans for system level IPs and systems. 4. Develop verification environments for IP and systems using
4/30/2013 Plano, TX Save This JobDesign Verification Engineer
SeaMicro
uThe role involves ASIC and FPGA verification including contributing to verification methodology, developing test plans that ensures high coverage between random, directed and in-system environments, system infrastructure development and debug, with significant focus on testing
5/9/2013 Sunnyvale, CA Save This JobSolution Test Engineer, Design Verification Engineering
Trilliant
Position Type: Full-time/Regular Trilliant is a fast-growing Silicon Valley clean-tech company providing end-to-end wireless solutions to utilities worldwide. Using advanced wireless networking technologies, Trilliant helps utilities to create very large scale wireless mesh
4/15/2013 Redwood City, CA Save This JobASIC VERIFICATION ENGINEER
Open-Silicon
Relevant Experience: 3+ years? experience in ASIC Verification Location: Raleigh, North Carolina Description: This position will be part of a small, fast-paced Verification team utilizing leading-edge verification tools and methodologies to enable the functional verification of
5/24/2013 Milpitas, CA Save This JobPrincipal ASIC Verification Engineer
ClariPhy Communications
Reporting to: Verification Manager, VLSI Engineering Location: Irvine, CA or Los Altos, CA Job Description The Design Verification team is growing and has need of a top talent, senior to principal level, ASIC functional verification engineer. Responsible for the development
4/21/2013 Irvine, CA Save This JobHardware Design Qualification and Verification Engineer
Exalt Communications
The engineer will be responsible for general test of advanced wireless networking systems for Microwave Backhaul and similar products. This individual will develop and perform manual and automated tests to verify new or updated product functions, product performance, and
4/24/2013 Campbell, CA Save This JobSoC Verification Engineer
Calxeda, Inc.
Calxeda is headquartered in Austin, Texas. Our company mission is to bring revolutionary computational efficiency to the data center built around the ultra-low-power ARM architecture. Furthermore, we are developing server platform technologies that scale efficiently to thousands
5/7/2013 Austin, TX Save This JobSoC Verification Engineer (California)
Calxeda, Inc.
Calxeda is headquartered in Austin, Texas. Our company mission is to bring revolutionary computational efficiency to the data center built around the ultra-low-power ARM architecture. Furthermore, we are developing server platform technologies that scale efficiently to thousands
5/7/2013 Sunnyvale, CA Save This JobSenior ASIC Verification Engineer
Solarflare Communications
Candidate will be responsible for high speed ASIC design and verification for Network controller type ASICs. 10+ experience in the ASIC and design and verification methodology, with some experience in emulation platforms is a plus. Candidate must have working experience of OVM
3/23/2013 Irvine, CA Save This JobStaff Verification Engineer
Link_A_Media Devices
Requirements: 4 to 8 years working experience in SoC verification. Familiar with digital design flow, including synthesis, timing closure, and formal check. Experienced in C/C++, Verilog/SystemVerilog, Perl. Familiar with the latest verification methodologies such as VMM,
3/23/2013 Santa Clara, CA Save This JobSenior Verification Engineer
Link_A_Media Devices
Requirements: 0 to 2 years working experience. Understand digital design concepts. Experienced in C/C++, Verilog, Perl. Familiar with SystemVerilog is a plus. Familiar with OOB concepts. Understands how to build testbench and testcases.
3/23/2013 Santa Clara, CA Save This JobSenior Field Applications Engineer
Jasper Design Automation
Job Description / Responsibilities will include the following: 1. Acquire new and advanced formal concepts and apply advanced engineering methodologies to solve customer verification problems 2. Provide pre and post sales support, including working closely with account
4/21/2013 Mountain View, CA Save This JobQuality Engineer
Jasper Design Automation
Job Description / Responsibilities will include the following: Provide post sales support, including working closely with Field Application Engineers and R&D as needed. Performing QA activities including testing of new features and bug-fixes as it relates to fixes and
4/21/2013 Mountain View, CA Save This JobSr. Apps Engineer, Southwest North America
Berkeley Design Automation
Company Overview Berkeley Design Automation is a recognized leader in nanometer circuit verification, especially for advanced analog, mixed-signal, and RF (AMS/RF) applications. The company?s Analog FastSPICE unified circuit verification platform provides the industry leading
5/6/2013 Santa Clara, CA Save This JobSr. Apps Engineer, East North America
Berkeley Design Automation
Company Overview Berkeley Design Automation is a recognized leader in nanometer circuit verification, especially for advanced analog, mixed-signal, and RF (AMS/RF) applications. The company?s Analog FastSPICE unified circuit verification platform provides the industry leading
4/6/2013 Santa Clara, CA Save This JobCamera Calibration Software Engineer (Sys004)
Pelican Imaging
Pelican Imaging is building the next leapfrog technology in computational imaging â with the potential to change every camera in the world.
Mountain View, CA Save This JobHardware Engineer - FPGA Verification
Palo Alto Networks
Description:We are looking for a self-motivated, team-oriented senior networking FPGA verification engineer to participate in the verification effort. This individual will be a key member of the FPGA system, full chip, and block level verification team. Responsibilities will
5/16/2013 Santa Clara, CA Save This JobHardware Engineer - Verification
Palo Alto Networks
We are looking for a self-motivated, team-oriented senior networking hardware verification engineer to join the hardware verification team. This individual will be a key member of the hardware system, full chip, and block level verification team. Responsibilities will include
5/5/2013 Santa Clara, CA Save This JobPrincipal ASIC Design Engineer
ClariPhy Communications
Job Description The engineer will be responsible for optical PHY DSP (Digital Signal Processing) centric block modeling, RTL design/coding, DSP block (can include vector matching) verification, synthesis and static timing analysis of next generation optical networking ASICs.
4/21/2013 Irvine, CA Save This JobCompanies: Design Verification Engineer Jobs
AccessClosureAchronix SemiconductorAlien TechnologyAltierreApplied OptoelectronicsAquion EnergyAtoptechAtrentaAudienceAurora NetworksAvalent TechnologiesAveillantAzimuth SystemsBARRX MedicalBelkin CorporationBerkeley Design Automation