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Principal VLSI Engineer Jobs

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Principal DFT Engineer

eASIC

Title: Principal DFT Engineer Location: Santa Clara, CA, USA Job ID: 030117 Reports to: Director, Engineering Job Summary/Objective The Principal DFT Engineer will be responsible for DFT methodology in the Company test pattern generation including JTAG, boundary scan, memory

3/29/2017  Santa Clara, CA  Save This Job

Principal Engineer, Physical Design

Inphi

Engineering Santa Clara, CA, United States Physical Design Engineer Principal Engineer to lead Physical Design activities on the next high complexity ASIC/advanced technology node. Candidate should be familiar with all phases of ASIC design from synthesized gates to GDS. This

2/19/2017  Santa Clara, CA  Save This Job

Principal Engineer, Physical Design

Inphi

Engineering Santa Clara, CA, United States Physical Design Engineer Principal Engineer to lead Physical Design activities on the next high complexity ASIC/advanced technology node. Candidate should be familiar with all phases of ASIC design from synthesized gates to GDS. This

2/19/2017  Santa Clara, CA  Save This Job

Companies: Principal VLSI Engineer Jobs