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Join the Ethertronics award-winning team to continue building the future in active antennas. This position has responsibility for developing the digital portion of Ethertronic?s RFICs and Front End Modules (FEMs) for active antenna applications, at the RTL (Register Transfer5/25/2015 San Diego, CA Save This Job
Reporting to: Director, VLSI Engineering Location: Irvine or Los Altos, CA Job Description The engineer will be responsible for low power design and implementation of advanced DSP (Digital Signal Processing) algorithms in high speed transceiver ASICs. Responsibilities include DSP6/4/2015 Irvine, CA Save This Job
Netronome is seeking a highly motivated, experienced Silicon Design Engineer in the Boxborough, MA office to join our Silicon Engineering team. This position will play a pivotal role in the implementation of a complex high-performance Network Processor SoC and supporting5/25/2015 Boston, MA Save This Job
Netronome Systems, Inc. seeks a Silicon Design Engineer ? Back End (multiple openings) to work in Boxborough, MA and to be responsible for gate-level implementation of the Register Transfer Level (?RTL?) and timing closure of the design. Work with Front-End team to understand5/25/2015 Boston, MA Save This Job
Circuit Design Engineer (Sr, Staff, Principle) (Santa Clara) We are looking for experienced analog/mixed-signal design engineer for developing complex configurable power, logic, and timing mixed signal IC products referred to as CMICs (Configurable Mixed-signal IC Products). The5/25/2015 Santa Clara, CA Save This Job
ABOUT THE COMPANY Inphi Corporation, a high-speed analog semiconductor company, is the market leader in data transport and signal integrity solutions from fiber to memory. We address the bandwidth, capacity and power issues faced by cloud computing, mega data center, and5/2/2015 Santa Clara, CA Save This Job
JOB DESCRIPTION: Experienced ASIC designer to design and develop digital components of wireless and display SOCs. Responsibilities include chip design / specification, FPGA prototyping, RTL coding, RTL verification, board bring up, and software integration/testing. The position5/3/2015 San Jose, CA Save This Job
Location: Milpitas, USA Relevant Experience: 8+ years. Job Description: Work with the architecture team and customers on solutions in Networking, Storage, Multimedia or other applications. Contribute to architecture / microarchitecture development. Responsible for writing5/27/2015 Milpitas, CA Save This Job
Location: Santa Clara, California, USA Job ID: SC03102015 Date required: Immediately Reports to: VP, IP and System Engineering Job Summary The individual will be responsible for developing, maintaining, and supporting PCS layers and soft PHY?s for eASIC?s products. Duties &5/11/2015 Santa Clara, CA Save This Job
Descriptions: Group introduction: VeriSilicon Multimedia Algorithms Group is designing the cutting-edge technologies for video and image processing and embedded vision system. We have a team with strong expertise working on video denoise, video encoding and decoding, Image5/9/2015 Santa Clara, CA Save This Job
Job Description / Responsibilities will include the following: Provide post sales support, including working closely with Field Application Engineers and R&D as needed. Performing QA activities including testing of new features and bug-fixes as it relates to fixes and5/23/2015 Mountain View, CA Save This Job
Job Description / Responsibilities will include the following: 1. Acquire new and advanced formal concepts and apply advanced engineering methodologies to solve customer verification problems 2. Provide pre and post sales support, including working closely with account5/23/2015 Mountain View, CA Save This Job
Reporting to: Manager, DFT Location: Irvine, CA or Los Altos, CA Job Description The engineer will be responsible for the DFT implementation, design, coding, synthesis and static timing analysis of the next general optical networking ASICs. Typical activities include development6/4/2015 Irvine, CA Save This Job
Inphi Corporation, a high-speed analog semiconductor company, is the market leader in data transport and signal integrity solutions from fiber to memory. We address the bandwidth, capacity and power issues faced by cloud computing, mega data center, and 40G/100G network5/2/2015 Santa Clara, CA Save This Job
At Open-Silicon, you will become part of an energetic, dynamic and self-motivated team who will challenge your systems analysis, IP integration and personal communications skills related to the high speed networking and memory bandwidth issues. Career opportunities are available5/27/2015 Milpitas, CA Save This Job
Staff Application Engineer - Santa Clara, CA Participate at the design, implementation and support of cutting-edge Electronic Design Automation (EDA) tools used to create, simulate, and verify physical design layout of Very Large-Scale Integrated (VLSI) circuits, including6/19/2015 Santa Clara, CA Save This Job
Netronome is currently seeking a Senior Design Verification Engineer in the Boxborough office. Job Duties: Degree in Electrical/Computer Engineering or equivalent 5 years of design verification experience Experience in coverage-driven design verification, networking protocols,5/25/2015 Boston, MA Save This Job
The Lead Software Engineer will participate on a project team of engineers involved in the development of software for network processing ASIC, with emphasis in platform OS embedded Linux programming. This position will define, architect, design, and deliver new software support6/24/2015 Pittsburgh, PA Save This Job
Department: Engineering Location: Melbourne, FL Avidyne Corporation is leading the general aviation (GA) industry in the design and manufacture of innovative and easy-to-use avionics systems. Avidyne is uniquely focused developing avionics systems that make flying safer, more5/20/2015 Melbourne, FL Save This Job
Calypto seeks an R&D engineer at the level of Sr Member of Technical Staff to work in the team that develops Calypto's Catapult High-Level Synthesis product line and their integration to Calypto's product lines for Formal Verification and Power Optimization. Calypto's High-Level6/2/2015 San Jose, CA Save This Job