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Senior Physical Design/Chip Integration Engineer Jobs

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Senior Engineer, ASIC DFT

Inphi

Engineering Santa Clara, CA, United States The engineer will be responsible for the DFT implementation, design, coding, synthesis and static timing analysis of the next general optical networking ASIC. Typical activities include development of hardware block design

1/17/2017  Santa Clara, CA  Save This Job

Companies: Senior Physical Design/Chip Integration Engineer Jobs