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Reporting to: Director, VLSI Engineering Location: Irvine or Los Altos, CA Job Description The engineer will be responsible for low power design and implementation of advanced DSP (Digital Signal Processing) algorithms in high speed transceiver ASICs. Responsibilities include DSP6/4/2015 Irvine, CA Save This Job
Netronome is seeking a highly motivated individual to join our Silicon Design team. In this position, you will play a key role in the development of high-performance Network Processor SoCs, with duties in the back-end implementation process. Job Duties: Physical implementation7/30/2015 Boston, MA Save This Job
Research, design and develop computer-aided very large scales integrated circuit (VLSI) physical design and verification tools for application specific integrated circuits (ASIC) and system on chip (SoC) design for advanced nodes (nanometers) processing, including the design and8/1/2015 Santa Clara, CA Save This Job
Staff Application Engineer - Santa Clara, CA Participate at the design, implementation and support of cutting-edge Electronic Design Automation (EDA) tools used to create, simulate, and verify physical design layout of Very Large-Scale Integrated (VLSI) circuits, including8/1/2015 Santa Clara, CA Save This Job
The Software Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop software sub-systems8/27/2015 Mountain View, CA Save This Job
The Staff Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop software architecture7/28/2015 Mountain View, CA Save This Job
Reporting to: Director, VLSI Engineering Location: Irvine, CA or Los Altos, CA Job Description The Design Verification team is growing and has need of a top talent, senior to principal level, ASIC functional verification engineer. May involve team or project5/5/2015 Irvine, CA Save This Job