CPU Verification Engineer NetLogic Microsystems

Description

This is an opportunity to work in the Multi-Core Processor team developing one of the fastest network processors shipping today, the XLP Processor Family. We will be joining forces with Broadcom soon to become an even strong processor powerhouse in the networking and communications market. This is a great time to join a relatively small team and make a big impact.

Check out our most recent press release about the XLP II here:

http://www.netlogicmicro.com/News/pr/2011/11-09-07xlpII.asp

The successful candidate will be directly responsible for all aspects of functional verification of one or multiple blocks in a high-performance CPU in the network processor SoC.

Responsibilities:

Verification of a high performance CPU pipeline at a CPU core level both architecturally and micro-architecturally
Understand micro-architecture of the block to be verified, and develop and execute testplans for the same
Develop micro-architectural checkers and coverage components for the block to be verified as part of testplan execution
Own and debug failures in simulation to root-cause problems
Closely work with RTL engineers of block being verified for testplan development, execution, and debug

Requirements:

Strong verification skills including a good knowledge and understanding of different verification methodologies (architecture vs micro-architecture level, random vs directed testing, fullchip vs module-level)
Good CPU architecture/micro-architecture knowledge (one of MIPS/PowerPC/ARM/x86/SPARC architectures, CPU pipeline, out-of-order, superscalar, caches)
Working knowledge and experience on Verilog and C++
Worked through tapeout on verifying a complex high-performance CPU on at least one project
Knowledge of Unix/Linux environment and scripting (perl/python)
Prior experience on system verilog assertions preferred.
BS (EE or CS) required with 3-8 years relevant experience. MS (EE or CS) preferred

Location:	Santa Clara, CA United States