Engineer-VLSI/Sr. Engineer-VLSI (Verification) Open-Silicon
THIS JOB HAS EXPIRED Job Description:
Candidates are expected to have sufficient hands-on experience in the following areas:
Good understanding of System Verilog and Working knowledge of VMM/UVM methodology is must.
Hands on work experience on Post synthesis simulation is added advantage.
Protocols required: PCIe Gen2, Sata Gen2, USB 3.0 Host/DRD, Networking, AXI.
Knowledge of generating Synopsys IPs using Core Consultant is added advantage.
Preferably should have worked on SOC project.
Knowledge of ARM processor will be an added advantage.
Should have good debugging skills for timing simulations.
Should have good scripting knowledge such as Perl, C shell, Make file etc.
||490 North McCarthy Boulevard |
Milpitas, CA 95035
THIS JOB HAS EXPIRED