Santa Clara Categories:
Hardware Engineer Achronix Semiconductor
THIS JOB HAS EXPIRED
Job Description/Responsibilities Primary Responsibilities:
The employee will work on the design, verification, and characterization of full-custom,
high-performance digital asynchronous circuits used in the next-generation Achronix
FPGA fabric, built in Intel?s 22nm 3-D Tri-Gate process technology. The employee will
work on one or more blocks (e.g., routing, block RAM) in the fabric, and his or her
primary responsibilties will be to work with the design leads for these blocks to do the
following:
? Create a verification plan for the blocks in question
? Execute against the verification plan (running digital and analog tests)
? Characterize the performance and power consumption of the blocks
? Work with mask designers and the design leads to implement the blocks
This work with require the employee to be familiar with commerical CAD tools used for
simulation and verification, as well as the scripting languages used to build customized
flows with these tools.
Secondary Responsibilities:
The employee will work with others in the team to maintain the Achronix CAD flow used
for designing, implementing, verifying, and characterizing full-custom circuits.
Skills:
? Employee should be comfortable with commercial CAD tools used for the
following:
o layout (e.g., Virtuoso XL)
o extraction (e.g., Star RC)
o LVS/DRC (e.g., Hercules / ICV) o Digital and analog simulation (e.g., VCS, hsim, hspice)
? Employee should be capable in some scripting language (Perl, Python, Tcl, etc.)
and have experience writing scripts to interact with commercial CAD tools.
? Employee will work frequently with members of other teams on interfaces
between blocks of future Achronix products and hence should have excellent
oral and written communication skills and be able to cooperate and work in a
small group.
Experience / Education:
? Previous experience in a VLSI project in deep submicron
o Experience in 65nm, 45nm, 28nm, or beyond is a plus
o Experience working with full-custom dynamic logic is a plus
o Experience working with layout designers is a plus
o Experience working on high-performance logic is a plus
? No prior experience with asynchronous VLSI required
? Preferred: BS/MS + 4-5 years experience
| Location: | Santa Clara, CA United States |
|---|
THIS JOB HAS EXPIRED
Achronix Semiconductor
Investors: Battery Ventures, Entrepia VenturesAll Jobs: at Achronix Semiconductor
| Web Site: | www.achronix.com |
|---|---|
| Headquarters: | 333 West San Carlos Street Suite 1050 San Jose, CA 95110 United States |
| Industry: | Semiconductors |
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