Jr. Implementation Engineer Calxeda, Inc.
THIS JOB HAS EXPIRED You can expect a broad range of responsibilities including, but not limited to the following:
--Responsible for all aspects of implementation (RTL2GDS) of ARM-based processors & SoCs targeting best-in-class data servers (High-Performance & Low-Power).
--Perform Performance, Power and Area trade-offs for optimal Silicon implementations.
--Resolve critical speed path with strong digital logic design techniques.
--Develop/Review implementation flows for High-Performance & Low-Power including Synthesis, Floor-planning, Place & Route, CTS and timing closure of CPU & SoCs.
--Ability to communicate clearly and present complex ideas.
--At least a B.S. degree in EE or CS with 2 or more years of relevant industry experience is required.
--Experience and knowledge of industry standard EDA tools for physical design implementation (Synthesis, Floor-planning, CTS, P&R, Equivalence Checking, Timing) in advanced CMOS technologies (45nm & below).
--Successful track record of taping out complex chips is preferred.
--Strong knowledge in Verilog.
--Good understanding of High-Performance Design techniques (RTL/Logic design for timing closure, Structured Datapath Design, Logic re-structuring/optimization, Cell Sizing, Custom buffering, Useful Clock Skew, etc.).
--Understanding of process variation effects in deep-submicron processes is required.
--Analyze and resolve coupling effects with respect to impact on timing.
--Proficiency in scripting languages - Perl, TCL, and Make is very desirable.
--Must be self-motivated.
--Must be creative with strong problem-solving.
--Should be flexible, adaptable, and work well in a team environment with excellent verbal and written communication skills.
Calxeda is an Equal Opportunity Employer
Apply for this job: http://tinyurl.com/6vymgjn
This role is at our Austin, TX location at Far West/Mopac
THIS JOB HAS EXPIRED