June 2014 Graduate - Verification Engineer (11786330) Freescale Semiconductor Inc.
THIS JOB HAS EXPIRED Primary Location: US-TX-Austin-Oak Hill (TX30)
Job Field: IC Design
Education Level: Bachelor's Degree
Job Type: Recent Graduate
Hardware/Software Co-Verification of network protocol accelerators.
The design verification engineers tasks are, but not limited to:
Writing and executing test plans for unit verification.
Writing coverage with SystemVerilog and SVA.
Writing monitors, drivers, response checkers and SVA for correctness.
Writing stimulus in SystemVerilog, random test scenarios, algorithmic and directed testcases.
Develop and maintain portions of a verification environment including scripts and Make files.
Attending tool interlock meetings to provide feedback on bugs and feature enhancements.
Debugging testcase fails.
Managing random simulation in 24/7 batch simulation farm.
Strong object oriented programming skills. Good background in computer architecture, including memory hierarchy. Knowledge of ARM cores and interconnect beneficial.
Programming skills (SystemVerilog, OVM/UVM, Verilog, C++, Perl, TCL, OOD, etc.)
OSI networking protocols required.
Network processors and accelerators.
Super-scalar computer architecture.
Minimum BSEE/BSCE/BSCS or equivalent.
For Electrical and Computer Engineering graduates a solid object-oriented programming foundation is highly desired.
For Computer Science graduates some knowledge of OSI network protocols and hardware is highly desired.
||Austin, TX |
THIS JOB HAS EXPIRED