Mixed Signal Design Engineer (Junior and Senior positions) SiTime
THIS JOB HAS EXPIRED
The mixed-signal circuit design engineer will be contributing to the development of SiTimes integrated circuits. SiTimes growth is fueled by an exciting line of timing devices, highlighted by programmable oscillators that are the heartbeats of cutting edge electronics. SiTime addresses the 5B timing market with leadership products that are the smallest, thinnest, most robust, reliable, and configurable.
The successful candidate will be responsible for design of analog and mixed-signal components at the block level, meeting their architectural requirements and technical specifications. Depending on the level of responsibility, the candidate may also contribute to the architectural definition of these blocks, and also to the chip integration. The design engineer will perform the necessary calculations, design and verification simulations to ensure the block meets all its requirements (both at the schematic level, and post layout extraction), and DFT and DFM are fully considered. The candidate will work closely with the layout designers to ensure the layout is completed properly, using all best known methods. The designer will be responsible for proper documentation of assigned blocks, and for holding preliminary and final design reviews. The candidate will actively participate in the chip bring up, evaluation and characterization (with emphasis on owned blocks). The candidate will address questions and issues related to his/her blocks raised by other personnel, such as product, characterization, test, or application engineers.
The ideal candidate would have direct experience designing successful components for products where very high volume production at high yields and low cost is simultaneously accompanied by rigorous technical requirements. These requirements typically apply (but are not limited ) to analog and digital blocks such as bandgaps, regulators, data converters, synthesizers, analog and digital filters, oscillators, and high-performance I/Os. The candidate should be comfortable and thrive in a dynamic environment where innovation, collaboration, rigor, and flexibility are the norm.
Requirements:
- MS with minimum of 3 years of experience or Ph.D., in Electrical Engineering
- Detailed knowledge of CMOS design, CAD and EDA tools, design kits, layout, and transistor models
- Strong background in analog/RF and/or mixed signal designs for blocks such as regulator, data converter, filter, VCO, PLL, charge pump, bandgap, I/O
- Some familiarity with automated digital design (Verilog, synthesis, place & route, STA, and mixed-mode simulations)
- Understanding of signal integrity
- Knowledge of programming languages: Oceanscript, Matlab, and VerilogA.
- Ability to perform own circuit layout for critical blocks
- Background in timing devices, a plus
- Familiarity with noise analysis
- Experience with designing very low power circuits
- Familiarity with chip-level power delivery and integrity, DFT, DFM, EOS and ESD, latch-up
- Familiarity with standard CMOS processes, such as 180nm, and 130nm nodes
- Some knowledge of CMOS device-level reliability
- Excellent written and verbal communication
- Must be very well organized, with great time-management capability
- Ability to work independently, with minimum supervision.
| Location: |
Sunnyvale, CA
United States
|
THIS JOB HAS EXPIRED