Performance Test Engineer Violin Memory
Responsibilities: Violin Memory, leader in flash based storage arrays is looking for an performance test engineer interested in joining a fast-paced, well-funded startup. The positions will be on Violin Memory's next generation products and data storage systems.
The responsibilities include:
Understand and characterize the performance aspects of our products (flash array and PCIe flash storage cards)
Develop sophisticated tools/scripts based on our existing framework in Python to characterize the performance
Understand and run existing tools, interpret/validate the results and post them
Configure the right performance environment. This includes installing the right OS/packages on clients, setting right number of paths to LUNS
Identify the bottle neck in the environment end-to-end. This includes fine tuning the OS parameters (linux or windows), workloads, workload generator configuration (eg. iometer, vdbench, etc), etc.
?Communicate what was done, why, how improvements were gained, and what others can do for better performance
Provide guidelines on setting performance expectations from our products. Work with development team on performance improvement areas identified.
Work cross-functionally with hardware (ASIC/FPGA), SQA, support and product management.
Benchmarking in different areas (SPC-I, Oracle, VDIs, etc)
Willingness to explore, learn, and automate open-source tools related to storage performance testing (eg. iometer, fio, vdbench, filebench, etc.)
BS/MS in EE/CS with minimum of 3 years of system software experiences (QA, automation or development), and 1+ year prior direct experiences in storage appliances.
Excellent analytical and problem solving skills are required.
Excellent written and verbal communication skills are required.
Excellent automation skills - Python and shell scripting preferred.
Operating System skills (?concepts, basic administration like install, network/storage configuration, etc.). Linux is a must.
Candidate must possess understanding of system architecture for distributed CPU, high available/high scalable enterprise class embedded system.
Knowledgeable in storage protocol is highly desirable.
Familiarity with Intel(x86) architecture and server architectures
Experience in flash based storage development
Storage testing experience with Windows
Experience in one of these storage protocols - FC, iSCSI or IB
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