Principal DSP Architect Tensilica
Key member of the DSP team for Tensilica working in the Baseband DSP Business Unit.The DSP Architect will work with the overall baseband team to help define how Tensilica's DSP, multi-core and configurable processor technologies support baseband and multimedia systems designs, and will articulate and define processor features and tools required of next generation processor technology to serve DSP platforms.
Working closely with processor and baseband system architects, the hardware and compiler development teams and baseband business unit management, the DSP architect will research and co-define the best technical strategy, product roadmap, processor definitions and detailed instruction sets and interfaces to ensure Tensilica?s dominance in the DSP core market, and in target vertical applications, especially wireless baseband, and high-performance multimedia.
The architect will play a central role in assessing how to most efficiently map both standard kernels and strategic customer code, especially benchmarks, onto Tensilica DSPs. This will include direct contribution to evolving general-purpose DSP instruction sets, defining new special-purpose instructions using Tensilica Instruction Extension (TIE) format and optimizing critical code kernels using new and existing DSP instruction sets.
The architect will work closely with Tensilica's field applications engineering team and DSP R&D, to support strategic design-in activity in accounts seeking to apply configurable DSP technology to new SOC platforms, especially in baseband subsystems. The architect will work closely with customers in analyzing performance- and power-critical software and interfaces and specifying partitioning and configuration of optimized DSPs and other Xtensa processing engines.
The DSP architect will also serve as a visible technical ambassador to the DSP and data-intensive embedded computing communities worldwide by developing and delivering high-profile technical presentations, and fostering professional relationships with similar elite architects at customers, partners, and other organizations.
This individual will support the organization's mission, vision, and values by exhibiting the following behaviors: excellence and competence, collaboration, flexibility, innovation, respect, accountability and ownership.
This job description reflects management's assignment of essential functions; it does not prescribe or restrict the tasks that may be assigned due to reasonable accommodation or other reasons.
Must be intimately familiar with the principles of performance-oriented code execution on processors, including the capabilities of compilers, the demands of key baseband and other DSP kernels and the state of the art in DSP instruction set and memory system capabilities. .
Must have experience in performance evaluation and software optimization.
Should be closely familiar with several major communication standards among DVB-T2, DVB-T, ISDB, T-DMB, ATSC, ATSC-M/H, LTE, LTE-Advanced, HSPA+, W-CDMA, G.Hn, WiMax, 802.11, and other widely used standards.
Strong written and verbal communications skills required. This role requires frequent interaction with Tensilica customers, Tensilica sales team, and Tensilica's marketing and engineering teams. Responsibilities include writing technical articles and white papers and developing detailed presentations for technical audiences.
Must be fully proficient in C code development. Proficiency in MatLab, Verilog and SystemC is highly desirable. Experience in optimizing algorithms and C for multi-core implementation highly desirable.
A history or active participation in baseband communications standards bodies is desirable.
Travel: Periodic travel, including international travel, will be required.
Must have BSEE and MSEE or equivalent, PhD preferred
Should have 10 years of processor or DSP architecture or performance-critical software development experience.
Santa Clara , California, United States
||3255-6 Scott Boulevard |
Santa Clara, CA 95054