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Principal Physical Design Engineer ClariPhy Communications
THIS JOB HAS EXPIRED
Job DescriptionThe engineer will be responsible for implementing tool flows and developing CAD methodologies generating flows & scripts. He/she will handle evaluation of tools in the development of new tool flows, and will also be responsible for managing related day to day timing closure/backend activities in meeting project schedules. The engineer will be required to code in scripting languages, TCL and Unix shell languages. Other script languages such as awk, perl, and C are a plus. In addition, the engineer will perform the following ASIC design tasks:
? Full chip level floorplanning/prototyping, integration and layout
? Block level layout and timing closure
? Static Timing/Crosstalk Analysis and timing closure
? Synthesis/Physical Synthesis
? Power/IR/EM analysis
? Physical verification (LVS/DRC/ERC)
? ECO implementation
Required Skills & Experience
? Must understand chip layout/physical design concepts, methodologies and flows (i.e. floorplanning, power planning, power/IR/EM analysis, custom routing, pad ring etc.)
? Must have an understanding of static timing and crosstalk/noise analysis and timing closure concepts, methodologies and flows.
? Must have an understanding of RTL/gate synthesis concepts, methodologies and flows.
? Solid hands on experience with the following areas of design:
o Layout, place and route
o Static timing/crosstalk analysis
o RTL/gate synthesis
o Physical verification
o Power/IR/EM analysis
? Hands on experience with following layout CAD tools is a must:
o Layout: Aprisa, Talus, ICC OR FirstEncounter
o Synthesis: Design Compiler OR RTL Compiler
o Static timing: Primetime, Tekton, Goldtime
? Minimum 10 years of experience with BSEE or 7 years experience with MSEE
| Location: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
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THIS JOB HAS EXPIRED
ClariPhy Communications
Investors: Allegis Capital, Norwest Venture Partners, ONSET VenturesAll Jobs: at ClariPhy Communications
| Web Site: | www.clariphy.com |
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| Headquarters: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
| Industry: | Semiconductors |
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