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Senior Analog Design Engineer ClariPhy Communications
Reporting to: Vice President, EngineeringLocation: Los Altos, CA
Job Description
The Company seeks an experienced Analog IC Design Engineer. Candidate will be involved with
the conception, design, and development of new-to-the-world very high speed analog CMOS
circuits. This person will work with industry leading design experts and be responsible for all
activities ranging from architecture and design, to silicon bring up and characterization. The
Company designs and manufactures high-speed communications integrated circuits. The
candidate will develop CMOS ADC, DAC, PLL, CMU, data converters with emphasis on
performance, size, and low power.
Required Skills & Experience
The candidate must have a proven track record in the design and layout of high performance,
low power, high speed CMOS A/D and D/A converters, PLL?s, PGA, and filters. Experience of
successfully releasing products to high volume production is desired. Must have experience in
advanced CMOS technologies such as 40nm and 28nm. The candidate must be capable of
playing a key role in the development of a complete AFE module. Experience with 10G+
communication and/or networking is a plus. Experience with digital calibration and
communications systems is a plus. The candidate will have 8+ years of experience.
? Low power, high performance analog circuit design
? Familiarity with Cadence environment
? Experience with analog behavioral modeling a plus (SystemC, System Verilog, Matlab)
? Self driven, result oriented individual
? MSEE required, Ph.D. degree in EE preferred
| Location: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
|---|
ClariPhy Communications
Investors: Allegis Capital, Norwest Venture Partners, ONSET VenturesAll Jobs: at ClariPhy Communications
| Web Site: | www.clariphy.com |
|---|---|
| Headquarters: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
| Industry: | Semiconductors |
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