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Senior Analog Layout Designer ClariPhy Communications
THIS JOB HAS EXPIRED
Reporting to: Vice President, EngineeringLocation: Irvine, CA
Job Description
We have an exciting opportunity for an experienced Layout Designer to grow with a wellestablished fabless semiconductor company. This person will work with industry leading design
experts and will be responsible for analog layout of state-of-the-art very high speed analog
CMOS circuits. The candidate must have a proven track record in the design layout of high
performance, low power, and high speed analog circuits. The ideal candidate will have an in
depth understanding of the design process and be comfortable floor planning from top down.
Required Skills & Experience
The position requires at least 5 years? industry experience and must have the following
experience:
? Proficient at using Virtuoso
? Experience using DRC/LVS
? Experience in 90nm or below
? Experience in unix/linux
? Ability to work closely with design engineers and take feedback
In addition to the required skills, experience in the following areas is highly desired:
? Calibre DRC/LVS or Cadence PVS
? Skill CAD
? Scripting ability (PERL, Python, Skill)
? P-cell development
? Library management / revision control
? Experience with LEF files, boundary cells, etc
? Some analog design skills is preferred
| Location: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
|---|
THIS JOB HAS EXPIRED
ClariPhy Communications
Investors: Allegis Capital, Norwest Venture Partners, ONSET VenturesAll Jobs: at ClariPhy Communications
| Web Site: | www.clariphy.com |
|---|---|
| Headquarters: | 16 Technology Drive Suite 165 Irvine, CA 92618 United States |
| Industry: | Semiconductors |
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