Senior/Staff Chip Verification Engineer Vweb
THIS JOB HAS EXPIRED
Description: Simulation and verification of Vweb's next generation MPEG1/2/4 and H.264 decoder and encoder chips.
Requirement:
o BS/MS EE/CS with 3
o years of experience in verifications. Expert in Verilog simulations and test bench generations.
o Familiar with MPEG and H.264 standards, embedded CPU, DMA, PCI, and CPU host bus.
| Location: |
18900 Stevens Creek Boulevard
Suite 200
Cupertino, CA 95014
United States
|
| Employment Type: | Full Time |
THIS JOB HAS EXPIRED