SoC HW Architect/Micro-Architect Tensilica
The SoC Hardware Architect defines and implements multi-core subsystem designs using Tensilica based technologies optimizing the solution for performance, power and area stated goals.
The SOC Architect owns the definition of baseband multi-core subsystem, including memory subsystem, interconnect, anticipating the integration issues that customers will encounter.
The SoC Architect gathers the requirements from the baseband system architects and baseband marketing, and understands the strength and the flexibility of the Tensilica technology to deliver subsystem architectures addressing the customers? demand and taking advantages of the Tensilica technology.
The SoC Architect is an expert understanding power, performance (cpu load, bandwidth, throughput and latency) and area tradeoffs using the state of the art process technologies.
The SoC Architect develops tools along the project to validate the assumptions of the architecture and tracks that the goals are met along the project.
The SoC Architect designs and implements the micro-architecture in configurable RTL using HDL language or generator using advanced scripting language.
The SoC Architect oversees the integration of several RTL blocks to build the sub-system products and ensure that the performance, area and power objectives are reached.
Knowledge of computer architecture and processor micro-architecture concepts
Solid logic design fundamentals with exposure to ASIC or SoC implementation requirements and constraints
Excellent working knowledge of Verilog and EDA simulation & synthesis tools
Good experience in scripting languages like Perl, Unix shell or similar languages
Proficient with ASIC and FPGA implementation and validation flows
Experience in system modeling
Experience in programming in a high level language such as C will be a plus
Some experience with assembly language programming will be a plus
Willing and eager to learn new concepts, technologies and standards
Excellent written and oral communication skills necessary
BSEE and MSEE or equivalent, PhD preferred. Should have 5+ years of multi-core architecture and/or micro-architecture development experience.
Santa Clara, California, United States
||3255-6 Scott Boulevard |
Santa Clara, CA 95054