RTL Design Engineer Calxeda, Inc.
THIS JOB HAS EXPIRED Calxeda is headquartered in Austin, Texas. Our company mission is to bring revolutionary computational efficiency to the data center built around the ultra-low-power ARM architecture. Furthermore, we are developing server platform technologies that scale efficiently to thousands of processor nodes with balanced, high-performance network and storage acceleration techniques, and advanced power management features.
If you like the idea of being a key contributor, and you like the idea of working for a company that wants to change the industry, then we'd like to hear from you!
-Responsible for the architecture specification and RTL design of processor chips and for technical leadership.
-Expertise in SoC architecture, ISA, memory consistency, I/O interfacing and protocols, performance modeling, and RTL design.
-Background in OS and application software, design verification and test, and chip implementation.
Education & Qualifications:
-A minimum of BSEE plus 10 years of experience in SoC architecture, performance modeling, and RTL design is required.
-Knowledge of ASIC design, chip verification and test, and system software is required.
-Experience in Verilog behavioral and RTL coding.
-Experience in simulation testbenches, bfm development, and design verification
-Experience in logic synthesis and timing analysis.
-System Verilog and VHDL
-Experience with scripting languages such as perl, tcl, etc.
-Experience with buses/protocols/standards such as PCIe, USB and MIPI
-Good analytical problem solving skills & the ability to work independently on challenging projects are required to excel in this position
Calxeda is an Equal Opportunity Employer. This role is located at our Austin, TX site at Far West/MoPac.
THIS JOB HAS EXPIRED