Sr. Staff Design Engineer - High Speed AnalogInphi
THIS JOB HAS EXPIRED
Sr. Staff Engineer
Analog and Mixed-Signal IC Design
Inphi Corporation, Santa Clara
Inphi Corporation (NYSE: IPHI), is a leading provider of high-speed analog/digital semiconductor solutions for the communications and computing markets, providing high signal integrity at leading-edge data speeds that are designed to address bandwidth bottlenecks in networks, minimize latency in computing environments and enable the rollout of next generation communications infrastructure from fiber to memory. Headquartered in Silicon Valley, CA, USA, Inphi?s products provide a vital interface between analog signals and digital information in high-performance systems, such as telecommunications transport systems, enterprise networking equipment, enterprise and data center servers, and storage platforms. Inphi's innovative solutions have resulted in the company's products being first to market, including the world?s first, lowest power, CMOS SERDES for 100GHz connectivity applications, memory registers and buffers, and drivers and TIAs.
We are seeking talented individuals to work on demanding technical challenges with an outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.
We are looking for analog and mixed-signal design engineers to contribute to the development of multi-GHz ADC/DAC, serial and parallel I/O, and clock generation / distribution for SoC ICs. The candidate must have a proven record of designing complex ICs in state of the art CMOS process technologies and has successfully placed products into volume production, preferably multiple times.
MSEE / PhD with minimum of 8+/4+ years experience in deep sub-micron analog/mix-signal circuit design.
High-speed and analog circuit design experience including one or more of the following: Low-jitter PLLs, DLLs, >10GHz High-speed custom circuits, SerDes, Clock and Data Recovery
High-speed >10GHz time-interleave ADC design experience a plus
Deep sub-micron process design experience at 28nm, 40nm or 55 / 65nm.
A track record of developing high volume commercial products
Working knowledge of industry best practices.
Experience of leading projects and/or a 2-3 people team is a plus
Strong fundamentals in circuit theory, design, and layout
Creative design ability to solve problems demanding the highest levels of speed and power performance
Experienced in Cadence design flow
Strong communication and presentation skills
Ability to work independently as well as in teams
Ability to work across functions and levels
Westlake Village, CA 91361