Staff Engineer Link_A_Media Devices
Staff Engineer, Santa Clara CA:
Responsible for design & implementation of register transfer level (RTL) coding for Flash Controller.
Participate in block level micro architecture, write detailed specifications for various designs involving RTL implementation.
Create test benches and tests in C/C++, Perl & Verilog.
Perform synthesis and timing check for designs.
Develop designs on FPGA platforms & create firmware to drive FPGA platform.
Support design bringup on FPGA prototype.
M.S. or foreign equivalent in Electrical or Electronics Engineering
Skills in: digital design, RTL design, functional verification, static timing analysis; FPGA design, validation & debugging; advanced computer architecture; Verilog, C, C++, Perl; Synopsys VCS & Design Compiler, PrimeTime, Xilinx ISE, Virtuoso Schematic Editor.
||2550 Walsh Avenue |
Santa Clara, CA 95051