Staff Field Applications Engineer Jasper Design Automation
THIS JOB HAS EXPIRED JOB DESCRIPTION:
Design software to support the formal verification of chip designs through an automated process of behavior-based Register Transfer Level (RTL) analysis and verification. Develop system to support rapid silicon validation on first physical constructs of proposed chip designs, including root-cause testing. Programming, testing, and debugging in Verilog, PSL, and OVL. Perform research and development into potential new tools, together with verification engineers, and test their feasibility for formal verification. Create methodologies to solve new verification problems. Work with R&D to tune the algorithm and accommodate all design styles.
Bachelor?s degree or foreign equivalent in Computer Science, Electrical Engineering, Software Engineering, or related, and 6 years of experience in the job offered or as an Application Engineer, Software Engineer, or related.
Experience must include:
Research and development in formal verification of chip designs.
Chip design languages including Verilog, PSL, and OVL.
Software development to support rapid silicon validation on first physical constructs, including root cause testing.
Behavior-based RTL analysis and verification.
||100 View Street |
Mountain View, CA 94041
THIS JOB HAS EXPIRED