Staff Verification Engineer NetLogic Microsystems

Description
Use your Verification expertise to perform verification in the development of our next generation high performance digital front-end processors (DFE).

This position is your chance to broaden your chip and system view as a member of the DFE Group, a key strategic group in NetLogic Microsystems? wireless play.

Become part of the excitement and be a key driver of the verification strategy of the DFE devices with complex DSP functions, combined with embedded processors and advanced SERDES interconnects.

You will be challenged to create a new verification environment, enhance our current verification environment and execute and enhance test plans and create new test cases/infrastructure for our design.

If you have a strong background in verification, and have innovative ideas we always have new challenges ahead.

Responsibilities:

Collaborate with logic designers on RTL model debug, bug fixes, and integration
Create the verification infrastructure
Develop strategies to speed up verification and improve coverage


Requirements:

BS in CS or EE (MS preferred)
8-10 years of relevant experience, to include a minimum of 2 years of Verification of chips with embedded processors
Prior knowledge of one or more of the following DDR2, (DDRII or greater), AXI/AHB, ARM or MIPS
Demonstrated knowledge and experience in programming System Verilog, SystemC, Specman or Vera
Strong verification skills, understanding of methodology (VMM, OVM, white-box, black-box, focused test, random testing, coverage), infrastructure (test bench)
Own and build complex environments
Prior experience with UNIX/Linux development environment: Shell/Perl scripting

Location:	Santa Clara, CA United States