STAFF VLSI VERIFICATION ENGINEER Audience
THIS JOB HAS EXPIRED Job Description
Your goal is to formulate and validate the next generation ASIC architecture for Audience?s market leading noise suppression products. You will work closely with VLSI Architecture, Design and DSP teams. Your responsibilities include modeling and validating hardware architectures and verification of RTL implementation.
Required Experience and Skills
8-12 years of experience with a proven track record of verifying SOC designs, with an emphasis on Audio, Signal Processing, or Multimedia
Understanding of the complete ASIC development flow for SOC products using an embedded processor
ASIC verification roles with an increasing level of responsibility
System simulation using tools and languages which explicitly model concurrency, such as SystemC or SystemVerilog.
Deep knowledge of ASIC verification, including modeling, multi-chip simulation and test bench creation
Experience building a constrained random verification environment
Proficient in SystemVerilog plus OVM, UVM or VMM to create verification system.
Excellent verbal and written communication skills
Self-starter ? motivated and able to work without extensive direction.
Desired Experience and Skills
Proficiency in Perl, Python, tcl, etc.
Experience with embedded software development in a DSP environment
Experience with IC semiconductor and intellectual property deliverables.
||1330 Villa Street |
Mountain View, CA 94041
THIS JOB HAS EXPIRED