Synthesis and Timing Hardware Engineer Calxeda, Inc.

Calxeda is bringing revolutionary computational efficiency to the data center, leveraging the ultra-low-power ARM architecture as the foundation for next generation server designs. Calxeda's platform will consume as little as 1/10th of the power of today's best-in-class servers, enabling data centers to realize significant reduction in capital expenses, power, space and cooling. The Calxeda platform is specifically designed for servers, scaling efficiently to thousands of processor nodes, with unique network and storage acceleration, and is further enhanced with management technology to deliver true "energy-proportional" computing.

And this is where you come in. The Calxeda team is looking for the best talent in the industry to join our quest in changing the industry. If you fit the qualifications below and want to make a difference in a company looking to impact an entire industry, then we want to hear from you.


Responsibilities:

-Synthesis at IP and SoC levels.
-Timing convergence and signoff for large-gate designs at multiple corners.
-Find and identify design problems, debug them, and devise work-arounds.
-Develop and deliver robust flows for high-performance, low-power SoC and CPU designs.
-Work closely with other design team members to implement the design, and to meet or exceed project objectives.
-Help ensure the electrical, logical, timing, and power integrity of the design.

Qualifications:

-At least a B.S. degree in EE or CS with 5 or more years of relevant industry experience is required.
-Either experience with EDA standard synthesis and timing tools (e.g., DC and PrimeTime) or expertise with equivalent functionality proprietary CAD tools is required.
-Must have a fundamental understanding of hold methodology and mintiming.
-Should be flexible, adaptable, and work well in a team environment with good verbal and written communication skills.
-Must understand process variation and coupling effects with respect to impact on timing.
-Should be competent with Verilog HDL.
-Knowledge of deep sub-micron reliability and technology issues is a plus.
-Must be self-motivated.
-Proficiency in scripting languages - Perl, TCL, and/or unix shell - is very desirable.
-Should be familiar with physical design effects on timing correlation.
-Must be creative with strong problem-solving skills.
-Successful track record of taping out complex chips is sought.


Calxeda is an Equal Opportunity Employer
Principals only

Location:	7000 N. Mopac Expressway Suite 250 Austin, TX 78731 United States
Employment Type:	Full Time
Functional Area:	Engineering / Product Dev / Science
Position ID:	121001