Test Development & Verification Engineer Tabula
THIS JOB HAS EXPIRED
Description
Are you hungry to contribute to a world-class team and work with one-of-a kind technology, built using the world?s most advanced semiconductor technologies? Do you want to ride the leading edge of a new IC design paradigm? We need a motivated, team-oriented engineer to help probe the inner workings of the latest programmable logic devices.
The successful candidate will?
? Develop new test flows to verify and characterize Tabula?s programmable logic fabric and high-speed I/Os.
? Work closely with architecture, design, and software teams to resolve chip bring-up issues.
? Optimize coverage and test time for manufacturing efficiency.
? Create systematic, expandable infrastructure for test generation and analysis.
Requirements:
? Expert level in RTL (Verilog) coding and simulation with emphasis on test vector generation.
? Strong background in test generation for FGPA, memory, and ASIC devices.
? Experience optimizing tests for production and fault isolation.
? Solid experience in hands-on hardware verification.
? Efficient and experienced problem-solving skills and communication skills.
? Advanced levels in scripting languages and utilities for test generation and data mining/statistical analysis.
Preferred Skills:
? Design and design verification experience.
? Background in high-speed I/O testing.
Years Experience:
? 10+ years or equivalent
Education Requirements:
? MS in a relevant engineering discipline
| Location: |
3250 Olcott Street
Santa Clara, CA 95054
United States
|
THIS JOB HAS EXPIRED