Timing Expert Design Engineer- Manycore Processors Tilera
Give your career a boost and be part of the excitement at Tilera, a late-stage, pre-IPO startup. Our business tripled from last year, we are generating solid revenue and we have a sharp eye on taking the company public in 18 to 24 months. The market winds are at our back with our unique iMesh manycore architecture and its high performance/watt/sqr inch ratio. We are already shipping the ground-breaking TILE-Gx72 processor and sustaining the momentum with new developments to capture more business in the networking and cloud markets.
We are seeking a strong Physical Designer who will grab the reins on a challenging project and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology, processor design, and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule. Your personal impact on the company by hitting the market window with this new product will be huge.
Here is the ideal background we'd like to see:
BSEE/MSEE with minimum of10 years in VLSI Design
Hands on experience taking processor design from concept through physical design to GDS.
Motivation to drive an exciting project
Demonstrable teamwork skills
A working knowledge of processor implementation flow including:
Place and route
Extraction and back annotation
Static timing analysis
Physical verification, and full-chip assembly.
TCL and Perl mastery are a necessity; Make and Python are nice to have additional experience.
We are looking for someone ready to prove they can do something big in a short amount of time. Check us out at www.tilera.com and apply today if you want to know that everything you do will contribute to the company's success.
||San Jose, CA |