Verification Engineer #2015 NetLogic Microsystems

Description

Job description: Verify architecture and micro-architecture functionality and performance features of state-of-the-art MIPS SoC with multi-core and multi-thread CPUs. Use CPU architecture/micro-architecture knowledge to develop and execute test plans. Collaborate with logic designers on RTL model debug, bug fixes and integration. Prior knowledge of the design to be tested (Micro-processor (CPU) architecture and pipelining) is required. Demonstrated knowledge and experience in programming Verilog, Object-oriented programming; and prior experience with UNIX/Linux development environment: shell/Perl scripting is required. Strong verification skills, understanding of methodology (white-box, black-box, layered/re-usable testbench, stimulus generation, results checking, and coverage) is required. Assertion languages experience such as System Verilog is required.



Requirements: Master?s degree or equivalent in Computer Science, Electrical Engineering, or related field of study.

Location:	Santa Clara, CA United States