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Verification Engineers Avalent Technologies
Verification EngineersRequired Skill and Experience:
Minimum BSEE/BSCS with 2 years of experience in hardware verification. The ideal candidate is intelligent, motivated, and team-oriented. Involved in the functional verification of an embedded microprocessor. Should be able to learn the instruction-set architecture and micro-architecture of the processor.
Responsibilities:
Responsibilities include developing diagnostic tests in assembly language, and working with designers on coverage analysis and bug isolation. The engineer will create tests by hand and by using a pseudo-random test generator. Additional responsibilities include developing test benches and DV tools.
| Location: | 405 River Oaks Parkway San Jose, CA 95134 United States |
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| Full Time |
Avalent Technologies
Investors: Sycamore VenturesAll Jobs: at Avalent Technologies
| Web Site: | www.avalent.com |
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| Headquarters: | 405 River Oaks Parkway San Jose, CA 95134 United States |
| Industry: | Semiconductors |
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