Altos Design Automation

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Web Site:
Headquarters:4020 Moorpark Avenue
Suite 100
San Jose, CA 95117
United States
Industry:Software
Investors:Vista Ventures

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Altos Design Automation Jobs

Senior Level R&D Engineers

Altos Design Automation

Requirements: Ph.D EE or MS EE plus 1+ years experience (4+ for Senior positions) of C++ and STL. Candidates should have good communication skills and be willing to work independently. We prefer candidates with experience in: SPICE Transistor level circuit analysis Standard

2/18/2014  San Jose, CA  Save This Job

Senior Application Engineers

Altos Design Automation

Ph.D EE or MS EE plus 5 years AE experience with knowledge of Tcl, Shell Scripting (Perl, AWK etc.) and excellent communication skills. We prefer candidates with experience in: SPICE simulation Transistor level circuit design and analysis Standard cell, memory, IP

2/18/2014  San Jose, CA  Save This Job