Atoptech

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Web Site:
Headquarters:3255-3 Scott Boulevard
Suite 200
Santa Clara, CA 95054
United States
Industry:Semiconductors
Investors:Acorn Campus Ventures

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Atoptech Jobs

R&D OPENINGS

Atoptech

Candidates should have BS/MS/Ph.D. in EE, CS, or related fields. Preferred knowledge/experience in the following areas: Timing Optimization - logic synthesis, physical synthesis, timing/power optimization, incremental timing analysis. Clock Tree synthesis - skew analysis,

3/15/2014  Santa Clara, CA  Save This Job

APPLICATION ENGINEER

Atoptech

Preferred knowledge/experience in the following areas: Design and implement integrated circuits, and support design flows using Electronic Design Automation tools, including formal verification methodology development, physical implementation methodology development for

3/15/2014  Santa Clara, CA  Save This Job