Link up your social media account to automatically promote the positions at Atoptech.
Get a job alert every time Atoptech posts a job.
Candidates should have BS/MS/Ph.D. in EE, CS, or related fields. Preferred knowledge/experience in the following areas: Timing Optimization - logic synthesis, physical synthesis, timing/power optimization, incremental timing analysis. Clock Tree synthesis - skew analysis,12/28/2014 Santa Clara, CA Save This Job
Preferred knowledge/experience in the following areas: Design and implement integrated circuits, and support design flows using Electronic Design Automation tools, including formal verification methodology development, physical implementation methodology development for12/28/2014 Santa Clara, CA Save This Job