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Reporting to: Verification Manager, VLSI Engineering Location: Irvine, CA or Los Altos, CA Job Description The Design Verification team is growing and has need of a top talent, senior to principal level, ASIC functional verification engineer. Responsible for the development4/21/2013 Irvine, CA Save This Job
Reporting to: Vice President, Engineering Location: Los Altos, CA Job Description The Company seeks an experienced Analog IC Design Engineer. Candidate will be involved with the conception, design, and development of new-to-the-world very high speed analog CMOS circuits.4/21/2013 Irvine, CA Save This Job
Job Description The engineer will be responsible for implementing tool flows and developing CAD methodologies generating flows & scripts. He/she will handle evaluation of tools in the development of new tool flows, and will also be responsible for managing related day to day4/21/2013 Irvine, CA Save This Job
Reporting to: Director, Systems Engineering Location: Los Altos, CA Job Description ClariPhy seeks a full-time experienced Principal Hardware Engineer for ClariPhy?s 100G coherent optical communications solutions. In this role, you will leverage your expertise in high speed4/21/2013 Los Altos, CA Save This Job
Job Description The engineer will be responsible for optical PHY DSP (Digital Signal Processing) centric block modeling, RTL design/coding, DSP block (can include vector matching) verification, synthesis and static timing analysis of next generation optical networking ASICs.4/21/2013 Irvine, CA Save This Job