PhaseLink

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Web Site:www.phaselink.com
Headquarters:47745 Fremont Boulevard
Fremont, CA 94538
United States
Industry:Semiconductors
Investors:Intel Capital

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Senior Analog Circuit Design Engineer

PhaseLink

Responsibilities: - Implement difficult, non-routine, complex CMOS Analog ICs from specifications to engineering prototypes with appropriate interfaces to Marketing and Manufacturing. - Take charge of difficult Frequency Control and Timing design projects requiring a high level

4/15/2012  Fremont, CA  Save This Job