| Web Site: | www.solarflare.com |
|---|---|
| Headquarters: | 9501 Jeronimo Road Suite 250 Irvine, CA 92618 United States |
| Industry: | Semiconductors |
| Investors: | Accel Partners, Foundation Capital, Intel Capital, Miramar Venture Partners, Oak Investment Partners |
Link up your social media account to automatically promote the positions at Solarflare Communications.
Get a job alert every time Solarflare Communications posts a job.
Responsibilities: Hands-on testing of Semiconductor ICs using test equipment and instrumental control software over different voltages and temperatures. Lab Equipment - inventory control, tracking, labeling, calibration, and repairs. Lab supplies - maintain and request
4/22/2013 Irvine, CA Save This JobWe are looking for a dynamic individual who understands the digital media market and knows technology. This person will be a product manager focusing on the digital media market and driving success for Solarflare's 10G Ethernet server adapter products. Solarflare is the fastest
3/23/2013 Irvine, CA Save This JobSolarflare are looking for an exceptionally capable software engineer who can grow a new development and support team based out of our Irvine office. Solarflare's software team is currently centred out of our Cambridge office in the UK and this role is the first in creating a new
3/23/2013 Irvine, CA Save This JobResponsibilities: Responsible for the design and verification of CMOS analog and mixed signal circuits at the transistor level Concentration will be on PLL and SerDes design Develop analog cell specifications and architectures Input schematics and run spice simulations Present
3/23/2013 Irvine, CA Save This JobResponsibilities: Responsible for the design and verification of CMOS analog and mixed signal circuits at the transistor level Concentration will be on PLL and SerDes design Develop analog cell specifications and architectures Input schematics and run spice simulations Present
3/23/2013 Irvine, CA Save This JobResponsibilities: Generate full custom layout of CMOS analog, transistor level circuits such as PLL's, Bandgaps, ADC's, DAC's, and Serdes circuits. Responsible for DRC/LVS clean layout generation. Requirements: Experience using Cadence version 6.1 Virtuoso layout and Mentor
3/23/2013 Irvine, CA Save This JobWe are looking for ASIC design engineers to create industry leading next generation high speed network controller ASIC products. Responsibilities: Micro-architecture and RTL coding based on architecture specification Generate synthesis and timing signoff constraints
3/23/2013 Irvine, CA Save This JobCandidate will be responsible for high speed ASIC design and verification for Network controller type ASICs. 10+ experience in the ASIC and design and verification methodology, with some experience in emulation platforms is a plus. Candidate must have working experience of OVM
3/23/2013 Irvine, CA Save This Job