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Responsibilities: Responsible for the design and verification of CMOS analog and mixed signal circuits at the transistor level Concentration will be on PLL and SerDes design Develop analog cell specifications and architectures Input schematics and run spice simulations Present10/23/2013 Irvine, CA Save This Job
This is a senior single-contributor position that offers the successful candidate the potential for a high value impact on the company's revenue plan and its influence on the market. We are looking for a senior technical marketer who can present the value proposition of10/23/2013 Irvine, CA Save This Job
We are looking for ASIC design engineers to create industry leading next generation high speed network controller ASIC products. Responsibilities: Micro-architecture and RTL coding based on architecture specification Generate synthesis and timing signoff constraints10/23/2013 Irvine, CA Save This Job