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Duties: Design and implement test logic for internally developed chips. Generate and debug test patterns and then work with the test vendor to convert those patterns to a test program. Work with test engineers to optimize the test program for volume manufacturing. Research and9/8/2016 San Jose, CA Save This Job
Engineering Santa Clara, CA, United States Physical Design Engineer Principal Engineer to lead Physical Design activities on the next high complexity ASIC/advanced technology node. Candidate should be familiar with all phases of ASIC design from synthesized gates to GDS. This7/26/2016 Santa Clara, CA Save This Job
SAN JOSE, CA AND SANTA MONICA, CA uBeam is seeking candidates with front and back end ASIC design. In this critical role, you will be a key player in the team driving the design and integration effort for uBeam ASIC efforts for our Wireless Charging products. Responsibilities7/30/2016 San Jose, CA Save This Job
JOB PURPOSE: This position is for PHY transceiver digital blocks design, verification, and chip integration. JOB DUTIES AND RESPONSIBILITIES: ? Design and verify of SOC ASIC. ? Work closely with the physical back-end team on synthesis, DFT, STA. QUALIFICATIONS/SKILLS: ?7/24/2016 Carlsbad, CA Save This Job