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VLSI Design Engineer Jobs

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Senior Principal, DSP ASIC Design Engineer

ClariPhy Communications

Reporting to: Director, VLSI Engineering Location: Irvine or Los Altos, CA Job Description The engineer will be responsible for low power design and implementation of advanced DSP (Digital Signal Processing) algorithms in high speed transceiver ASICs. Responsibilities include DSP

3/30/2015  Los Altos, CA  Save This Job

Staff Software Engineer

Audience

Job Description The Staff Software Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop

4/8/2015  Mountain View, CA  Save This Job

Staff Software Engineer

Audience

Job Description The Staff Software Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop

4/8/2015  Mountain View, CA  Save This Job

Senior Software Engineer

Audience

Job Description The Senior Software Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop

4/8/2015  Mountain View, CA  Save This Job

Staff Software Engineer

Audience

Job Description The Staff Software Engineer will collaborate with Marketing, DSP Algorithms, Hardware, Digital VLSI, Analog VLSI, and Quality Assurance groups to specify, review, test, and troubleshoot System-On-Chip hardware and software integrated into mobile devices. Develop

3/9/2015  Mountain View, CA  Save This Job

STAFF APPLICATION ENGINEER

Atoptech

Participate at the design, implementation and support of cutting-edge Electronic Design Automation (EDA) tools used to create, simulate, and verify physical design layout of Very Large-Scale Integrated (VLSI) circuits, including synthesis of register transfer level (RTL) to gate

3/10/2015  Santa Clara, CA  Save This Job

Principal ASIC Verification Engineer

ClariPhy Communications

Reporting to: Director, VLSI Engineering Location: Irvine, CA or Los Altos, CA Job Description The Design Verification team is growing and has need of a top talent, senior to principal level, ASIC functional verification engineer. May involve team or project

3/30/2015  Irvine, CA  Save This Job

Companies: VLSI Design Engineer Jobs