Principal Engineer, Physical Design Solarflare Communications
THIS JOB HAS EXPIRED Responsibilities:
Responsible for Netlist to GDSII implementation
Tasks include chip level integration, LVS, DRC, antenna checks, maintaining a bump map and package matrix.
Minimum of 10 Years of experience delivering complex ASIC's on tight schedules with a proven record of first silicon success.
Recent experience with 40nm and 28nm technology nodes (TSMC) is a must.
Leadership role in defining back-end methodology and flow
||9501 Jeronimo Road |
Irvine, CA 92618
THIS JOB HAS EXPIRED