Senior Verification Engineers Avalent Technologies
Required Skill and Experience:
Minimum BSEE/BSCS with 5 years of experience in hardware verification. A strong background in the functional verification of an embedded microprocessor. Previous experience in the instruction-set architecture and micro-architecture of the processor, developing diagnostic tests in assembly language with coverage analysis and bug isolation required.
Able to work independently with self motivation to meet aggressive schedule and deadline. Responsible for large block and full chip level / debug, power and clock design in deep sub-micron SoC.
||405 River Oaks Parkway |
San Jose, CA 95134
|Employment Type:||Full Time|