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Research, design and develop advanced clock tree synthesis technologies, including clock tree synthesis engine design, and optimization of design performance for advanced node processing. Research and design algorithms for timing optimization, including gate level power6/19/2015 Santa Clara, CA Save This Job
Research, design and develop computer-aided very large scales integrated circuit (VLSI) physical design and verification tools for application specific integrated circuits (ASIC) and system on chip (SoC) design for advanced nodes (nanometers) processing, including the design and6/19/2015 Santa Clara, CA Save This Job
Research, design and develop the detail router component of P&R (Place and Route) EDA (Electronic Design Automation) tools, including the DFM (Design for Manufacturability) and QoR (Quality of Result) at the latest (such as 20nm node) semiconductor processing. Implement6/19/2015 Santa Clara, CA Save This Job
Staff Application Engineer - Santa Clara, CA Participate at the design, implementation and support of cutting-edge Electronic Design Automation (EDA) tools used to create, simulate, and verify physical design layout of Very Large-Scale Integrated (VLSI) circuits, including6/19/2015 Santa Clara, CA Save This Job